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Multi-Threaded Dense Linear Algebra Libraries for Low-Power Asymmetric Multicore Processors

机译:用于低功耗非对称矩阵的多线程密集线性代数库   多核处理器

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摘要

Dense linear algebra libraries, such as BLAS and LAPACK, provide a relevantcollection of numerical tools for many scientific and engineering applications.While there exist high performance implementations of the BLAS (and LAPACK)functionality for many current multi-threaded architectures,the adaption ofthese libraries for asymmetric multicore processors (AMPs)is still pending. Inthis paper we address this challenge by developing an asymmetry-awareimplementation of the BLAS, based on the BLIS framework, and tailored for AMPsequipped with two types of cores: fast/power hungry versus slow/energyefficient. For this purpose, we integrate coarse-grain and fine-grainparallelization strategies into the library routines which, respectively,dynamically distribute the workload between the two core types and staticallyrepartition this work among the cores of the same type. Our results on an ARM big.LITTLE processor embedded in the Exynos 5422 SoC,using the asymmetry-aware version of the BLAS and a plain migration of thelegacy version of LAPACK, experimentally assess the benefits, limitations, andpotential of this approach.
机译:密集的线性代数库(例如BLAS和LAPACK)为许多科学和工程应用提供了相关的数值工具集合。尽管存在许多当前多线程体系结构的BLAS(和LAPACK)功能的高性能实现,但这些库的改编对于非对称多核处理器(AMP)的申请仍在等待中。在本文中,我们通过基于BLIS框架开发针对BLAS的非对称感知实现来解决这一挑战,并为配备两种类型内核的AMP量身定制:快速/耗电与慢速/高能效。为此,我们将粗粒度和细粒度并行化策略分别集成到库例程中,该例程分别在两种核心类型之间动态分配工作负载并在同一类型的核心之间静态重新分配此工作。我们在Exynos 5422 SoC中嵌入的ARM big.LITTLE处理器上的结果,使用了不对称感知的BLAS版本和传统版本的LAPACK的简单移植,通过实验评估了这种方法的优势,局限性和潜力。

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